1. Field of the Invention
The present invention relates to a maintenance method of a probe card. The probe card is a jig designed to test the electrical properties and characteristics of a plurality of semiconductor integrated circuits formed on a wafer.
2. Description of the Related Art
When a plurality of semiconductor integrated circuits are formed on a wafer in a process of manufacturing a semiconductor device, electrical properties of the semiconductor integrated circuits in the wafer state are tested before the wafer is cut into a plurality of pieces (chips) by dicing. A probe card having a plurality of probes thereon is used for the testing. In testing the electrical properties of the semiconductor integrated circuits, the wafer having the semiconductor integrated circuits formed thereon is placed on a measurement stage of a prober, the probes of the probe card come into contact with external electrode drawing-out pads on the semiconductor integrated circuits, and the electrical properties of the semiconductor integrated circuits are measured. It is possible to determine whether each semiconductor integrated circuit (that is, each chip) possess desired electrical properties or not through such measurement. Screening of defective semiconductor integrated circuits is performed based on the determination.
In the measurement performed with the probe card, the probes must contact the external electrode drawing-out pads of the semiconductor integrated circuits a plurality of times, with the result that tip ends of the respective probes may be bent and/or positionally misaligned. When such bending and/or position misalignment occurs at the tip ends of the probes, it is not possible to accurately measure the electrical properties of the semiconductor integrated circuits.
In general, the measurement with the probe card is carried out at high temperature (for example, 100° C. (degrees C.) or higher). Therefore, foreign matter, such as solder particles (bump scrap) of the external electrode drawing-out pads, may attach to the probes as the measurement is carried out repeatedly. If foreign matters adhere to the probes, it is not possible to accurately measure the electrical properties of the semiconductor integrated circuits.
A test apparatus (prober) and a cleaning method to cope with the above-mentioned problems are disclosed in Japanese Patent Application Kokai (Publication) No. 2005-79253 and Japanese Patent Application Kokai No. 10-92885. In Japanese Patent Application Kokai No. 2005-79253, the positions of probes in the test apparatus are detected, and the alignment between a wafer and a probe card is accurately and rapidly performed based on the detection result. Because the technology of Japanese Patent Application Kokai No. 2005-79253 detects the probe positions in the test apparatus, it is possible to know the probe positions during the testing at high temperature. The technology of Japanese Patent Application Kokai No. 10-92885 heats the probes in a test apparatus to melt bump scrap attached to the probes, and the probes are ground. Since tip ends of the probes are heated to a temperature sufficient to melt the bump scrap, it is possible to easily remove the bump scrap from the probes.